Multi-gigabit per second (Gbps) communication between various chips or “ports” on a circuit board or modules on a backplane has been in use for quite a while. Data transmission is usually from a transmitter that serializes parallel data for transmission over a communication media, such as twisted pair conductors as a cable or embedded in a backplane, fiber optic cable, or coaxial cable(s), to a receiver that recovers the transmitted data and deserializes the data into parallel form. However, data transmission greater than 20 Gbps over communication paths has been difficult to achieve because various signal impairments, such as intersymbol interference (ISI), crosstalk, echo, and other noise, can corrupt the received data signal to such an extent that a receiver having various decision feedback and analog equalizers might not be able to recover the transmitted data at the desired high data rate with an acceptable level of error performance. One possible reason for this shortcoming is that data rates 20 Gbps and higher are approaching the maximum speed of the transistors used to implement the receiver, reducing the amount of signal processing that can be achieved to improve the quality (e.g., the amount of “eye opening”) of the received signal. Further, because power consumed by CMOS circuitry is generally proportional to the frequency of signals being processed by the circuitry, the amount of power consumed by a receiver operating at these data rates might be unacceptably high when the receiver is providing the acceptable level of error performance.
One way to improve the quality of the received signal is for the signal transmitter, operating in conjunction with the signal processing circuitry in the receiver, to drive the channel with signals that have been pre-distorted by a filter. One such filter used to pre-distort the transmitted signal is a finite-impulse response (FIR) filter with adjustable coefficients or taps, referred to herein as a TXFIR filter. With most common data communication standards (e.g., PCIe Gen3, SAS-3, 16GFC, and 10GBASE-KR, all of which are included herein by reference in their entirety), the coefficients of the TXFIR filter are controlled by the receiver using a back channel from the receiver to the transmitter. However, as with receivers, the high data rates are approaching the speed of the transistors in the transmitter, thereby reducing the amount of pre-distortion the TXFIR can provide. Further, as a consequence of using as high a speed transistors as possible in the transmitter, the voltage handling capability of the transistors is concomitantly reduced so that the amplitude of the data signals from the transmitter are reduced and further degrading the quality of the signals at the receiver.
Therefore, it is desirable to provide a receiver that can readily process 20 Gbps or higher data rates at an acceptable level of power consumption.